This demo is part of
RECC
Full Debug View (10000x slower)
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UART1_IN Ready
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UART1_OUT Ready
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UART1_IN Asserted
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UART1_IN Enabled
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UART1_OUT Asserted
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UART1_OUT Enabled
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TIMER1 Asserted
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TIMER1 Enabled
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RTE Bit
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Global Interrupt Enable
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Processor Halted
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Registers
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Location
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Instruction
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Binary Instruction Decomposition
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Value
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SP Address
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Value
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